Many times, wireless modules will fail to verify during the inspection process. The main reasons for verification failure are data loss and errors during the verification process. In short, the verification process is a process completed by the sender and the receiver. The data packet is sent to the serial port, and then the sending end sends the data packet to the specified location of the receiving end, and the receiving end checks the bytes at the specified location. At the same time, the received data calculates the receiving end check byte according to the prescribed method. If the check byte at the receiving end is equal to the check byte received at the sending end, the data packet is valid; otherwise, it must be abandoned. This is also the main reason why we often fail during the verification process.
The most widely used wireless module verification methods are parity check and double cyclic redundancy code check. During the serial data transmission process, error codes may be generated due to information errors that may be caused by interference. The errors we find during transmission are called check codes, and they are corrected after they occur.
In addition to these two common verification methods, there are also XOR verification, summation, etc. Among them, the parity verification method is the simplest and crudest. However, the disadvantage of this method is that it can only detect errors and cannot correct them, so once an error is encountered , the error cannot be detected and the packet can only be forwarded. In addition, the cyclic redundancy code check method has good automatic error correction function, but it is also much more complicated than the parity check method. So when we do verification, which algorithm to choose depends on how we choose it.